NXP Semiconductors /MIMXRT1064 /IOMUXC_GPR /GPR33

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Interpret as GPR33

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OCRAM2_TZ_EN_0)OCRAM2_TZ_EN 0OCRAM2_TZ_ADDR0 (LOCK_OCRAM2_TZ_EN_0)LOCK_OCRAM2_TZ_EN 0 (LOCK_OCRAM2_TZ_ADDR_0)LOCK_OCRAM2_TZ_ADDR

LOCK_OCRAM2_TZ_EN=LOCK_OCRAM2_TZ_EN_0, LOCK_OCRAM2_TZ_ADDR=LOCK_OCRAM2_TZ_ADDR_0, OCRAM2_TZ_EN=OCRAM2_TZ_EN_0

Description

GPR33 General Purpose Register

Fields

OCRAM2_TZ_EN

OCRAM2 TrustZone (TZ) enable.

0 (OCRAM2_TZ_EN_0): The TrustZone feature is disabled. Entire OCRAM2 space is available for all access types (secure/non-secure/user/supervisor).

1 (OCRAM2_TZ_EN_1): The TrustZone feature is enabled. Access to address in the range specified by [ENDADDR:STARTADDR] follows the execution mode access policy described in CSU chapter.

OCRAM2_TZ_ADDR

OCRAM2 TrustZone (TZ) start address

LOCK_OCRAM2_TZ_EN

Lock OCRAM2_TZ_EN field for changes

0 (LOCK_OCRAM2_TZ_EN_0): Field is not locked

1 (LOCK_OCRAM2_TZ_EN_1): Field is locked (read access only)

LOCK_OCRAM2_TZ_ADDR

Lock OCRAM2_TZ_ADDR field for changes

0 (LOCK_OCRAM2_TZ_ADDR_0): Field is not locked

1 (LOCK_OCRAM2_TZ_ADDR_1): Field is locked (read access only)

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